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asic design engineer 数字电路设计工程师 北京百瑞互联技术有限公司 北京百瑞互联技术有限公司,百瑞 job description
• independent block and soc rtl design and verification
• analog and digital ip integration
• rtl handoff quality check using eda tools
• prepare signoff quality full chip sdc file
• prepare signoff quality full chip upf file
• support asic implementation
• support fpga prototyping
• support dft integration
• support software and system production
• write design documents
qualifications
• 2+ years hands-on experience in asic rtl design. experience in bluetooth, mobile computing or iot is a plus
• familiar with popular asic solutions (including specification and architecture)
• familiar with asic design verification and implementation flow
• familiar with relevant qa tools (for example spyglass)
• strong debugging and analytical skills, generate ideas, and provide innovative solutions to solve technical problems
• english documents reading
• good programming in perl/python, tcl and shell programming
• self-motivated, team work, and good communication skills