第3篇 电子设计工程师cadence/fpga岗位职责职位要求

岗位职责：

1. 在cto的技术指导下、在研发部总监的领导下，研发产品的硬件平台；

2. 配合研发部软件工程师和工程部系统工程师调试、测试产品。

职位要求：

1. 精通fquarters ii/verilog编程开发；

2.独立完成过至少三个电子设计项目；

3.熟练掌握焊接和数字电路调试，熟练使用示波器；

4. 至少掌握下列一项技能：quarters ii/verilog编程或cadence allegro设计；

5. 自我学习能力强，能熟练阅读英文资料和交流邮件；

6. 具备良好的职业意识、团队作战思维、乐于助人的态度；

7. 具有良好的文字和口头表达能力。

words from ceo:

this position is very special and we are looking for a young fellow with great potentials. your technical boss is our cto residing in silicon valley and he will teach you everything he knows. you have to aim high! english will be your working language and we expect you have good skills and trainings in written languages both in english and in chinese. you will mostly working on fpga programming in our team. all you have to do is to spend every second of working hours and some spare time to learn cool things and make them real! we have paved the way for you!

岗位要求：

学历要求：本科

语言要求：不限

年龄要求：不限

工作年限：3-5年